A New Approach to Avoid Nuisance Tripping of ASDs

Sept. 1, 2001
Voltage sags usually cause under-voltage trips in ASDs. Short-term power interruptions of a few cycles result in rapid decreases in ASD DC-link voltage and require appropriate energy storage for ride-through. Voltage swells (CSTs), however, result in momentary increases in DC-link voltage (greater than 1.3 per unit) and usually cause overvoltage trips.

An increasing number of commercial and industrial facilities are using adjustable-speed drives (ASDs) with pulse-width modulation (PWM). The benefits include improved efficiency, energy savings, and electronic process control. But modern ASD equipment is more susceptible to utility transients such as sags, swells, and utility capacitor-switching transients (CSTs). This article describes a new approach that helps allay CST nuisance tripping of PWM ASDs. The method involves electronically damping the CST event by introducing a soft-charge resistor (available in most ASDs) into the series path of the power flow.

Voltage sags usually cause under-voltage trips in ASDs. Short-term power interruptions of a few cycles result in rapid decreases in ASD DC-link voltage and require appropriate energy storage for ride-through. Voltage swells (CSTs), however, result in momentary increases in DC-link voltage (greater than 1.3 per unit) and usually cause overvoltage trips.

The most common cause of transient overvoltages is a utility CST, second only to lightning in frequency of occurrence. In ASD equipment, the DC-link capacitor (Cd), DC-link inductance (Ld), and utility line inductance (Ls) form an LC resonant circuit. During a CST event, the LC resonant circuit is excited and produces a current surge, which leads to the rise of DC-link voltage. In order to protect the insulated gate bipolar transistors (IGBTs) and diodes, an overvoltage trip occurs, causing nuisance tripping of the ASD. Fig. 1 illustrates a typical CST event with a momentary rise in the ASD DC-link voltage.

To date, common methods to prevent nuisance tripping of ASDs include the following:

  • installing additional line reactance (3% to 5%) in front of the ASD (This approach alters the LC resonance and reduces the overvoltage. However, it makes the ASD more susceptible to tripping on common voltage sags.)
  • employing pre-insertion resistors/inductors during capacitor switching or high-speed static circuit breakers with zero-voltage closing control (These solutions are expensive and must be installed by utility personnel.)

Analysis of CST Events

The utility CST is a relatively common power-system phenomenon in a power distribution system (see Fig. 2, on page 28). Utilities often use capacitor banks to maintain the distribution voltage level under varying load demands.

In order to evaluate the effect of utility CSTs on ASDs, a simplified representation and an equivalent circuit of the power system are shown in Fig. 3. The drawing on the left shows a simplified representation of a CST in a typical power system, while the illustration on the right models the power system as an LC circuit for the transient response.

The worst case of the voltage peak may occur on restriking the capacitor bank with a trapped charge of 1 per unit. In this case, if the restrike occurs when the source voltage reaches its peak, the voltage across the contacts of the switch will be two times the source peak system In Fig. 4, the top drawing shows the topology of a typical ASD, and the one on the bottom illustrates the equivalent circuit. The utility input voltage (Vs) represents the source voltage with a magnitude equal to two times the maximum line-to-line voltage (for a worst case CST). In addition, the steady state Vdc is as follows:

Vdc=1.35VLL

An Alternative Solution

Take a look at the typical PWM ASD topology in Fig. 5, which consists of a 3-phase diode rectifier, DC-link, and PWM inverter. Typically, a soft-charge resistor (Rsoft-charge) and a bypass relay module are employed in the DC-link power flow path of the ASD equipment to prevent overcharge of the DC-link capacitor during initial startup.

After a predetermined delay by the ASD control circuit, a relay contactor in steady state bypasses the soft-charge resistor. Hence, the DC-link power flows through the ASD relay module without any DC voltage drop in the main power flow path.

In the proposed approach (see Fig. 6, on page 30), the relay used to bypass the soft-charge resistor is replaced by an IGBT. Under normal conditions, the IGBT is enabled and the soft-charge resistor is effectively short-circuited. However, during a CST event, the IGBT is essentially deactivated and the soft-charge resistor is introduced in series with the DC-link capacitor (Cd) such that the Vdc transient is effectively damped.

Furthermore, the value of effective damping resistance (Rsoft-charge) can be adjusted by suitably modulating the on-off time of the IGBT. This feature facilitates electronic control and suitable damping can be achieved for various types of CST events and varying utility-line impedance. Fig. 6 also shows the block diagram for CST detection, control of the IGBT, and feedback control of Vdc.

Sometimes, a commercial ASD trips at a small percent (25%) above the nominal DC-link voltage. In this case, the proposed approach uses the soft-charge resistor to mitigate the CST disturbance on the DC-link voltage. The table gives the required damping resistance values (Rdamp) for different ASD output levels.

Conclusion

Experimental tests simulating a variety of utility CST events were conducted. The test setup (see Fig. 7) consisted of a commercial ASD (480V, 16kVA, 60 Hz) powered from a programmable AC power source, along with a delta-connected capacitor bank.

Test results confirmed that the soft-charge resistor effectively dampens the momentary high energy generated by the CST event. The mitigated action continues for a 5-cycle interval to reduce and maintain the ASD DC-link voltage and thus, avoid nuisance tripping. Now you can easily integrate the proposed approach into your ASD equipment as a low-cost alternative to other mitigation methods.

Dr. Prasad N. Enjeti is a professor at Texas A&M University. He is the lead developer of the power electronics and power quality laboratory at Texas A&M and actively involved in many industry projects. Enjeti received the Fellow grade from the IEEE last year. He holds four U.S. patents and has licensed two new industry technologies. You can e-mail him at [email protected].

José Luis Durán-Gómez received his Ph.D. in electrical engineering from Texas A&M University in December, 2000. He currently is a member of the technical staff at Tyco Electronics in Mesquite, Texas.

About the Author

Prasad N. Enjeti

Voice your opinion!

To join the conversation, and become an exclusive member of EC&M, create an account today!

Sponsored Recommendations

Electrical Conduit Comparison Chart

CHAMPION FIBERGLASS electrical conduit is a lightweight, durable option that provides lasting savings when compared to other materials. Compare electrical conduit types including...

Don't Let Burn-Through Threaten Another Data Center or Utility Project

Get the No Burn-Through Elbow eGuide to learn many reasons why Champion Fiberglass elbows will enhance your data center and utility projects today.

Considerations for Direct Burial Conduit

Installation type plays a key role in the type of conduit selected for electrical systems in industrial construction projects. Above ground, below ground, direct buried, encased...

How to Calculate Labor Costs

Most important to accurately estimating labor costs is knowing the approximate hours required for project completion. Learn how to calculate electrical labor cost.